rfi 操作

if (!followed_by_stop())

illegal_operation_fault();

unimplemented_address = 0;

if (PSR.cpl != 0)

privileged_operation_fault(0);

taken_rfi = 1;

PSR = CR[IPSR];

if (CR[IPSR].is == 1) { //resume IA-32 instruction set

if (PSR.ic==0 || PSR.dt==0 || PSR.mc==1 || PSR.it==0)

undefined_behavior();

tmp_IP = CR[IIP];

if ((CR[IPSR].it && unimplemented_virtual_address(tmp_IP))

|| (!CR[IPSR].it && unimplemented_physical_address(tmp_IP)))

unimplemented_address = 1;

//compute effective instruction pointer

EIP{31:0}= CR[IIP]{31:0} - AR[CSD].Base;

//force zero-sized restored frame

rse_restore_frame(0, 0, CFM.sof);

CFM.sof = 0;

CFM.sol = 0;

CFM.sor = 0;

CFM.rrb.gr = 0;

CFM.rrb.fr = 0;

CFM.rrb.pr = 0;

rse_invalidate_non_current_regs();

//The register stack engine is disabled during IA-32

//instruction set execution.

} else { //return to Itanium® instruction set

tmp_IP = CR[IIP] & ~0xf;

slot = CR[IPSR].ri;

if ((CR[IPSR].it && unimplemented_virtual_address(tmp_IP))

|| (!CR[IPSR].it && unimplemented_physical_address(tmp_IP)))

unimplemented_address = 1;

if (CR[IFS].v) {

tmp_growth = -CFM.sof;

alat_frame_update(-CR[IFS].ifm.sof, 0);

rse_restore_frame(CR[IFS].ifm.sof, tmp_growth, CFM.sof);

CFM = CR[IFS].ifm;

}

rse_enable_current_frame_load();

}

IP = tmp_IP;

instruction_serialize();

if (unimplemented_address)

unimplemented_instruction_address_trap(0, tmp_IP);